CI20 EJTAG

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    Matt
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    Apologies if this has been addressed, but my searches didn’t turn up anything.

    There are a couple of threads out there that brush on the subject of not seeing the ROCC bit of the EJTAG CONTROL register clearing:

    http://sourceforge.net/p/openocd/mailman/message/32876001/
    https://groups.google.com/forum/#!topic/mips-creator-ci20/yEYqrx2L8mA

    but no resolution. I’m currently using a BusBlaster v3 with OpenOCD and am probing the JTAG signals with a Saelae Logic 16 as a sanity check. No matter what I scan into the DR after selecting the ECR, I always subsequently scan out 0xC0000000.

    I’d really like to make use of this combo of OpenOCD and BusBlaster for low level JTAG access. Can anyone point me in a direction to move? I’m happy to read docs, look at examples, hack some code.

    Matt

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