Does the instruction or data cache take up the address space?

This topic contains 6 replies, has 3 voices, and was last updated by Profile photo of Enrique Enrique 6 days, 7 hours ago.

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  • #55974
    Profile photo of alex
    alex
    Member

    hello all
    Does the instruction or data cache take up the address space?

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    #55977
    Profile photo of Enrique
    Enrique
    Member

    Hi Alex,

    If I understand correctly, you are asking if the caches are mapped to the address space, am I right?

    The answer is no, they do not have their own addresses in the memory map. Instruction and data caches store local copies of some of the contents of main memory so that the access time by the CPU to that information is faster. Instruction and data caches are internal to the CPU pipe and not visible* from the outside, in particular not from the memory map or address space.

    I hope this solved your question,
    E.

    * You can actually interact directly with the cache through cacheops and sync instructions, but that’s a different topic of discussion 🙂

    #55978
    Profile photo of ZubairLK
    ZubairLK
    Member

    Hi,

    The answer to this question varies depending on what angle you are looking from.
    From a HW perspective, the physical address space is not taken up by the caches.

    From a SW perspective, the answer is slightly tricky. The microAptiv has a memory management unit.
    From the perspective of the MIPS core, the physical address space is mapped to a virtual address space.

    For further detail, check the microAptiv Software User Manual in the documentation. There is a section on Memory Management Unit. Another helpful resource is http://www.johnloomis.org/microchip/pic32/memory/memory.html

    Regards
    ZubairLK

    #55979
    Profile photo of alex
    alex
    Member

    Thanks for your replies
    From the figure you can see that cache is mapped to the physical address from 0x0 to 0x3fffc

    #55980
    Profile photo of Enrique
    Enrique
    Member

    Hi Alex,

    The cache will contain instructions and data that is stored in addresses 0x0 to 0x3fffc, but that is different from saying that it is mapped to those physical addresses. At least, in the way usually memory mapping is understood.

    Thanks,
    E.

    #55992
    Profile photo of alex
    alex
    Member

    HI
    You mean that instruction or data cache only will cache instruction or data form 0x0 to 0x3ffffc,but cache has no its own address,no use the physical address space

    #55999
    Profile photo of Enrique
    Enrique
    Member

    Hi,

    Yes, that’s correct.

    Thanks,
    E.

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