Halium on Clovertrail+

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  • #58642

    Ilya
    Member

    Hello everyone 🙂

    I am working on a Halium (halium.org) port for ASUS ZenFone 5, a Clovertrail+ based phone that uses a PowerVR GPU. Porting Halium base to this platform enables numerous open-source projects, including Ubuntu Touch (ubports.com), Plasma Mobile (plasma-mobile.org), LuneOS (webos-ports.org) and Mer (merproject.org) to use all of the Clovertrail+ devices for development and testing.

    I am proud to report that as of now, the device boasts a stable 3.10 kernel and Android 7.1-based system build that has Wi-Fi, touch sensor, hardware keys, LEDs and vibrator working.

    sf

    Source code:
    Kernel: https://github.com/Halium/android_kernel_asus_T00F
    Device tree: https://github.com/Halium/android_device_asus_T00F

    However, I have a long-term struggle with graphics. Currently, Libhybris EGL and hwcomposer tests report EGL configuration and manage to clear the screen, but the actual draw fails.
    Below is all of the debug information I could get. Tests draw in a loop, so the logs are printed in a loop as well.

    dmesg:
    MRSTLFBFlipTimerFn: swapchain is not empty, flush queue
    [drm]
    1.level1 interrupt status
    [drm] PSB_INT_MASK_R mask 0x1f279fbd
    [drm] PSB_INT_ENABLE_R mask 0x180040
    [drm] dev_priv->vdc_irq_mask = 0x180040

    [drm] 2.level2 interrupt register
    [drm] pipe 0 config 0xf9100000 status 0x607
    [drm] pipe 1 config 0x0 status 0x0

    [drm] 3.check irq and workqueue relationship
    [drm] vsync_te trouble: [ 308.115019]
    [drm] pipe 0 last vsync_te irq: [ 307.870252]
    [drm] pipe 0 last vsync_te workqueue : [ 307.870324]
    [drm] pipe 0 workqueue be delayed : [ 0.000071]
    [drm] pipe 0 vsync te missing 245ms !

    [drm] pipe 1 last vsync_te irq: [ 0.000000]
    [drm] pipe 1 last vsync_te workqueue : [ 0.000000]
    [drm] pipe 1 workqueue be blocked : [ 308.115434]

    [drm] pipe 1 vsync te missing 308115ms !

    logcat:
    I hwcomposer: Sprite count: 0, Primary count: 2, Overlay count: 1 # this block is not looped
    I hwcomposer: PixelFormatConverter: initialized
    D hwcomposer: [DISPLAY]hwc_blank notify blank
    D hwcomposer: [DISPLAY] virtual bool IntelDisplayDevice::blank(int):: blank(0)
    D hwcomposer: [DISPLAY]bool IntelHWComposerDrm::setDisplayDpms(int, bool): On 7

    D libEGL : loaded /vendor/lib/egl/libEGL_POWERVR_SGX544_115.so # this block is not looped
    D libEGL : loaded /vendor/lib/egl/libGLESv1_CM_POWERVR_SGX544_115.so
    D libEGL : loaded /vendor/lib/egl/libGLESv2_POWERVR_SGX544_115.so

    W hwcomposer: virtual bool IntelHDMIDisplayDevice::commit(hwc_display_contents_1_t*, const native_handle_t**, int*, int**, int&): HDMI does not connected

    strace:
    open(“/etc/powervr.ini”, O_RDONLY) = -1 ENOENT (No such file or directory) # not looped

    ioctl(6, DRM_IOCTL_MODE_GETENCODER, 0xbfaa7890) = -1 EINVAL (Invalid argument) # not looped
    ioctl(6, _IOC(_IOC_READ|_IOC_WRITE, 0x64, 0x4f, 0x28), 0xbfaa7978) = -1 EINVAL (Invalid argument) # not looped

    open(“/system/vendor/lib/libPVROGL.so”, O_RDONLY|O_CLOEXEC) = -1 ENOENT (No such file or directory) # this block is not looped
    open(“/system/lib/libPVROGL.so”, O_RDONLY|O_CLOEXEC) = -1 ENOENT (No such file or directory)
    write(2, “library “libPVROGL.so” not found”, 32library “libPVROGL.so” not found) = 32

    ioctl(4, _IOC(_IOC_WRITE, 0x64, 0x52, 0x1c), 0xbfaa7424) = 0

    ioctl(20, SYNC_IOC_WAIT, 0xbfaa766c) = 0

    ioctl(4, _IOC(_IOC_WRITE, 0x64, 0x52, 0x1c), 0xbfaa6164) = 0
    ioctl(5, _IOC(_IOC_READ|_IOC_WRITE, 0x57, 0x02, 0x08), 0xbfaa76dc) = 0
    ioctl(5, SW_SYNC_IOC_CREATE_FENCE, 0xbfaa76dc) = 0
    ioctl(22, SYNC_IOC_MERGE, 0xbfaa7660) = 0

    socket(PF_LOCAL, SOCK_STREAM, 0) = 22
    connect(22, {sa_family=AF_LOCAL, sun_path=”/dev/socket/property_service”}, 31) = -1 ENOENT (No such file or directory)
    close(22) = 0
    open(“/system/build.prop”, O_RDONLY) = 22
    fstat64(22, {st_mode=S_IFREG|0644, st_size=3244, …}) = 0
    close(22) = 0
    socket(PF_LOCAL, SOCK_STREAM, 0) = 22
    connect(22, {sa_family=AF_LOCAL, sun_path=”/dev/socket/property_service”}, 31) = -1 ENOENT (No such file or directory)
    close(22) = 0
    open(“/system/build.prop”, O_RDONLY) = 22
    fstat64(22, {st_mode=S_IFREG|0644, st_size=3244, …}) = 0
    close(22) = 0
    access(“/odm/lib/hw/gralloc.redhookbay.so”, R_OK) = -1 ENOENT (No such file or directory)
    access(“/vendor/lib/hw/gralloc.redhookbay.so”, R_OK) = 0

    open(“/vendor/lib/hw/gralloc.redhookbay.so”, O_RDONLY|O_CLOEXEC) = 22
    readlink(“/proc/self/fd/22”, “/system/vendor/lib/hw/gralloc.re”…, 4096) = 43
    fstat64(22, {st_mode=S_IFREG|0644, st_size=68440, …}) = 0

    socket(PF_LOCAL, SOCK_STREAM, 0) = 22
    connect(22, {sa_family=AF_LOCAL, sun_path=”/dev/socket/property_service”}, 31) = -1 ENOENT (No such file or directory)

    It would be really nice if someone with PowerVR architecture experience could help to troubleshoot. Here is the complete strace log of a running test, which should have all the information available: https://nofile.io/f/J89sOwo6d2q/strace.zip . Please ask me if you need more.

    Thank you for reading this far! 🙂

    Best regards,
    Ilya Bizyaev <bizyaev@zoho.com>

    • This topic was modified 3 weeks, 1 day ago by  Ilya.
    • This topic was modified 3 weeks ago by  Ilya.
    • This topic was modified 3 weeks ago by  Ilya.
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    #58660

    Ilya
    Member

    Enabled kernel DRM debug and got this log:

    Attachments:
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