hello all when I read datasheet

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  • #56422

    hello all
    when I read datasheet, A brief guide to the 24K® core implementation
    All 24K family cores are based on a nine-stage pipeline,(http://cdn2.imgtec.com/documentation/MD00355-2B-24KPRG-PRG-04.63.pdf),
    but other datasheet say it is eight -stage (http://cdn2.imgtec.com/documentation/MD00346-2B-24K-DTS-04.00.pdf),why?

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    #56425

    Sergey
    Member

    Hello.
    First of all read document “MIPS32® 24K(c)f™ Processor Core Datasheet”, section “Pipeline Flow”. The section describes all stages of the pipepline. IR, Ik, IT are MIPS16e only. But in other document, section “A brief guide to the 24K® core implementation” considers IT state as an obligatory stage of the pipeline.
    I think that is the reason of difference.

    #56426

    Thanks for your replies!
    To mips 24k,whether it support multicore through ocp I/F?
    thanks

    #56435

    Sergey
    Member

    I don’t know examples of using MIPS 24K in multicore configuration. In the set of classical cores (https://www.imgtec.com/mips/classic/) only 1004K and 1074K are described as multicore.

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