MIPS MicroAptiv Nexys4 DDR Implementation: Boot Loader

This topic contains 4 replies, has 3 voices, and was last updated by  ZubairLK 1 year, 10 months ago.

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  • #51918

    I am currently trying to make a boot loader which I am going to load into the RAM via the “ram_reset_init.txt” file, which is read into the memory during implementation. My problem is that I cannot find a good guide to writing boot loaders online. I also want to mention that this should be a very simple boot loader, which initializes the SPI link, so that the soft core listens to the SPI signals and transfers all the information into the RAM, as it comes. After the processor has loaded the program into memory, the boot loader can tell it to start executing the program which has just been transferred.
    Also, is there any environment in which I can incorporate the whole GCC toolchain?
    I have actually seen that there might be a chance of using Eclipse, but I need more guidance in order to understand exactly how I could load the toolchain into its path.
    Sorry if it is a bit too easy for some, but I have tried looking for the right documentation and researching this on the internet and I could not find guides that could help me with some guidance for writing boot code for this (or a similar) architecture and implementing it.
    I must also mention that I am working on this for my third year porject, so I am a bit constrained by time. I really need a good starting point, that is all.
    Thank you very much.

    Regardc,
    Chris

    #52028

    Sean
    Moderator

    Chris,

    Is this the MIPS FPGA project that you are working on?

    I’m not clear what you are trying to do when you say “environment in which I can incorporate the whole GCC toolchain?”. Please could you explain what you want to achieve here? Do you mean an IDE which incorporates the GCC toolchain for MIPS?

    Regards,

    Sean.

    #52038

    Hi Sean,

    It is the MIPS FPGA project.
    And yes, that is exactly what I meant.
    Thank you.

    Regards,
    Chris.

    #52040

    Sean
    Moderator

    Chris,

    I’ve moved your conversation to the MIPS FPGA specific topic an asked one of my colleagues who is more familiar with the MIPS FPGA project to take a look.

    Regards,

    Sean.

    #52082

    ZubairLK
    Member

    Hi,

    A very interesting project. Can be a great learning experience.

    A few questions and some comments.

    Are you asking based on MIPSfpga Getting started Guide and fundamentals ‘only’?
    Have you looked into MIPSfpga SoC? It could be of interest as it runs the Linux Kernel on MIPSfpga.

    I am currently trying to make a boot loader which I am going to load into the RAM via the “ram_reset_init.txt” file, which is read into the memory during implementation. My problem is that I cannot find a good guide to writing boot loaders online.

    Perhaps you could look into this.

    http://code.lardcave.net/2015/02/10/1/

    The guys runs bare-metal code on the MIPS Ci20 and documents it quite a bit. This will allow you to understand the software parts a bit.

    I also want to mention that this should be a very simple boot loader, which initializes the SPI link, so that the soft core listens to the SPI signals and transfers all the information into the RAM, as it comes. After the processor has loaded the program into memory, the boot loader can tell it to start executing the program which has just been transferred.

    It looks like you already have a rough idea of a bootloader you want to implement. If you look at the code provided with MIPSfpga for the C parts, that is a bootloader itself. I would recommend using that as a starting point. It initializes the cache and the stack so that C code can run on the MIPS core.

    You then need to write a simple protocol.

    PC sends Hi, here is an ELF file. Load it in memory at location X. Then check ELF entry address. Jump to that address.

    ELF is a standard executable file format. https://en.wikipedia.org/wiki/Executable_and_Linkable_Format

    What is the executable that you want your bootloader to load?

    Also, is there any environment in which I can incorporate the whole GCC toolchain?
    I have actually seen that there might be a chance of using Eclipse, but I need more guidance in order to understand exactly how I could load the toolchain into its path.

    Google should turn up a few hits. https://www.google.co.uk/search?q=eclipse+cross+compile+toolchain
    Not exactly for MIPS or MIPSfpga. But the concept is similar. Eclipse CDT has project settings where you can give a compiler/toolchain path.

    For this sort of work, I would recommend using a Linux PC.

    I must also mention that I am working on this for my third year porject, so I am a bit constrained by time. I really need a good starting point, that is all.

    Please do take a look at MIPSfpga SoC. When you have, perhaps you could look into porting u-boot or barebox to run on MIPSfpga SoC.

    Regards,
    ZubairLK

    p.s. SPI is an option for transferring data to the bootloader. UART is also an option. I suggest UART because the USB cable connected to the Nexys4DDR board already has UART connected to the FPGA. Even for other boards, USB to UART cables for PC are more readily available compared to cables to transfer data from PC via SPI.

    I know a guy has made some progress on UART but hasn’t posted on the forums yet I think.

    The choice of SPI/UART is irrelevant to the rest of the bootloader parts.

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