The microAptiv core in MIPSfpga does not include HW Virtualisation.
The UDI (User Defined Instructions) are supported (and the reference manual is in the Getting Started package), and some users have exploited these for security purposes.
The latest Warrior M class (M5100/M5150) fully supports HW virtualisation and this core can be licenced by academia for a modest annual fee through either Europractice or MOSIS.
You are in EMEA+Russia and would be served by Europractice.
Thanks for your interest in MIPS cores.
The Europractice licence gives you access to the Verilog so yes, you can modify the core.
The size of FPGA depends on the configuration you choose and the amount of memory.
In the MIPSfpga package we recommend a Nexys 4 DDR board from Digilent as a starting platform for SoC development.