Get Hands-on With A Non-obfuscated Fully-verified MIPS Core for Teaching and Projects!
“Teaching Computer Architecture using MIPSfpga and the Xilinx-Digilent Nexys 4 DDR platform”
National Research University of Electronic Technology, former Moscow Institute of Electronic Technology (MIET) , October 26th 2015
Lomonosov Moscow State University (MSU), October 27th 2015
National Research Nuclear University (MEPhI), former Moscow Engineering Physics Institute, October 28th 2015
ITMO University, former Saint Petersburg National Research University of Information Technologies, Mechanics and Optics, October 30th 2015
The Imagination University Programme is pleased to host a series of one-day workshops specifically for teachers, based on the new “MIPSfpga” core.
MIPSfpga is the RTL source code of the MIPS microAptiv for implementation on an FPGA. It is a member of the same family found in many embedded devices, including the popular PIC32MZ microcontroller from Microchip and Samsung’s new Artik1.
This workshop will show you how to use this core as part of a Computer Architecture course, which will pave the way for your students to use it in their projects, in effect creating their own SoC designs.
With its long heritage and excellent documentation MIPS is the preferred choice of RISC architecture for many teachers around the world. But in the past, to demonstrate key concepts, teachers had to settle for creating partial “MIPS-like” cores or using unofficial copies of dubious heritage. Not now! MIPSfpga is the real “industrial” RTL, non-obfuscated, and available freely for academic use.
These workshops are part of a global programme of events to enable teachers to harness this wonderful technology. You can be among the first to get hands-on with MIPSfpga!
In addition we are offering you the opportunity to attend an event organised by Microchip Technology in Saint Petersburg. Please see details at the bottom.
- Welcome & Introduction to the Imagination University Programme (IUP)
- Introduction to MIPSfpga
- MIPSfpga and Vivado Demonstration:
- Simulation: Increment LEDs program
- Increment LEDs delay program on the Nexys 4 DDR
- Synthesizing core on the Nexys4 DDR
- Codescape MIPS SDK: using Codescape to develop & debug C and assembly code
- Bus Blaster/OpenOCD: using the Bus Blaster JTAG probe and OpenOCD to debug a target system
- Lab 1: Writing C code
- Lab 2: Adding a 7-segment display I/O
- Integrating Xilinx IP blocks with MIPSfpga
- Porting to other boards – Example: Digilent’s Basys3
- Teaching Materials for MIPSfpga / Wrap-up / Q&A
After your day of training you will be proficient in porting MIPSfpga to a suitable platform, and aware of its potential to revolutionise your teaching of Computer Architecture.
All delegates will be given access to the MIPSfpga core, the full Getting Started Guide (written by Sarah Harris with contributions from Xilinx), detailed reference documentation about MIPS microAptiv, and other vital information/programs that enable the whole package to work effectively.
To participate in these hands-on exercises, attendees will need to bring a Windows laptop. Installing Xilinx Vivado (free Webpack Edition) and Imagination’s Codescape MIPS SDK (free online edition) in advance will save time on the day.
Locations, Dates & Trainers
Trainer from Imagination Technologies – Yuri Panchul, Senior Hardware Design Engineer, MIPS Processors business unit
October 26: Moscow / Zelenograd: National Research University of Electronic Technology, former Moscow Institute of Electronic Technology (MIET).
• Aleksey Pereverzev, prof., head of Computer Engineering chair
• Peter Andreev, lead software engineer
• Evgeny Liventsev and Alexander Silantiev, assistants
October 27: Moscow: Lomonosov Moscow State University (MSU).
• Mikhail Shupletsov, Ph. D., Assistant Professor at the Department of Mathematical Cybernetics, Faculty of Computational Mathematics and Cybernetics
• Vladislav Podymov, Ph. D., Researcher at the Department of Mathematical Cybernetics, Faculty of Computational Mathematics and Cybernetics
• Boris Danilov, Researcher at the Department of Mathematical Cybernetics, Faculty of Computational Mathematics and Cybernetics
• The seminar is endorsed by “Mathematical theory and applications of discrete control systems” Master’s program’s supervisor Sergey Andreevich Lozhkin, Dr. Sc., Vice Dean for scientific work and finance, Professor at the Department of Mathematical Cybernetics, Faculty of Computational Mathematics and Cybernetics.
October 28: Moscow: National Research Nuclear University “MEPhI”, former Moscow Engineering Physics Institute.
• Maxim Gorbunov, Ph. D., lecturer at Micro- and Nanoelectronics Department, a researcher at Scientific Research Institute of System Analysis of the Russian Academy of Sciences (SRISA)
October 30: Saint Petersbug: ITMO University, former Saint Petersburg National Research University of Information Technologies, Mechanics and Optics.
• Dr. Alexey Platunov, prof. at the Computer Science Department
• Ph.D. Pavel Kustarev, associate prof. at the Computer Science Department.
• Bikovsky Sergey, Antonov Alexander, Yanalov Roman, Pinkevich Vasily, post-graduates at the Computer Science Department
We are pleased to announce that Macro Group Russia are providing on-site expert support at the workshops.
They are experienced with the Xilinx Vivado tools, and they will give a presentation about Xilinx FPGAs at ITMO and MIIET covering Artix/Kintex/Virtex-7, Ultrascale, Vivado, IP integrator and IP library.
These workshops are free of charge for members of academia but places are limited and demand will be strong, so please apply for your place quickly. Please do not apply if you are not sure you can attend.
- These workshops are open to academic faculty members, with a priority for those involved directly in teaching.
- We reserve the right to accept or refuse registrations based on our desire to enable the broadest spectrum of universities and colleges to participate.
- Prior experience of Vivado or Codescape MIPS SDK are useful but not essential.
These workshops are free of charge for members of academia but places are limited and demand will be strong, so please apply for your place quickly. (However, please do not apply if you are not sure you can attend.) Please apply online click here.
Find out about the Imagination University Programme
For more information or enquiries, please visit our IUP page or the University Forum .The IUP Team will be on-hand to discuss your interests. To stay in touch, please register for the Imagination University Programme here
You are invited to please circulate this e-mail to academic friends and colleagues…
ADDITIONAL SEMINAR – MICROCHIP MASTERS – RUSSIA
October 29: Saint Petersbug / Zelenogorsk: Microchip Masters Russia
• Microchip Masters Russia is an event organized by maker of microcontroller Microchip Technology and its partner in Russia Gamma Saint Petersburg. Unlike full-day MIPSfpga seminars in universities, the presentation during the seminar will be just 1 ½ hour overview. You can get more information about Microchip Masters Russia on website of Gamma Saint Petersburg.